The present invention relates to a memory device and, more particularly, to a memory device used in a memory having a serial access function in the column direction (i.e., the next access address is determined).
In a conventional random access memory, a series of operations are performed in one cycle which is determined in accordance with control signals or address signals of an external input. These operations include accepting and decoding an externally input address in a column direction, activation of a column selection line to transfer data to a data bus line, and activation of an output driver to output the data.
On the other hand, in a memory having a serial access function, an address to be accessed next is determined, unlike in the random access memory. For this reason, the above series of operations need not be performed in one cycle determined by the externally input signals, but can be set up (prepared) beforehand.
However, in the arrangement where only one data transmission system is provided, the above series of operations must be performed by a single data transfer system, regardless of an operation state from which an access in a present cycle is started. For this reason, although an access itself can be performed at a high speed, it is difficult to reduce a cycle time.